RobotDyn STM32F303CC Mini System Dev Board

Limited support for STM32F3 based boards, e.f STM Discovery and Nucleo line
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Rick Kimball
Posts: 71
Joined: Thu Mar 14, 2019 6:27 pm
Location: Eastern NC, US
OS: Linux
IDE: Arduino 1.8.9, vscode+make, eclipse, vi, emacs
Core: libmaple, STM official, fabooh, none
Board: Bluepill, Nucleos, Discovery
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RobotDyn STM32F303CC Mini System Dev Board

Post by Rick Kimball » Wed Jun 12, 2019 4:45 pm

My RobotDyn F3 boards came today. I soldered on the boot jumper headers and then tried out a simple Blink sketch. All the DFU boot happy people should be ecstatic with these boards. Out of the box the hardware DFU download just worked. On linux I did this:

1.) Set the BOOT0 jumper to 1, press the reset button and then execute:

$ dfu-util -d 0483:df11 -a 0 -s 0x08000000 -D Blink.ino.bin

2.) Switch the BOOT0 jumper back to 0 and press reset to watch it blink.

I used the dfu-util that came from apt-get install dfu-util. It is 0.9.

Blinky.ino.bin for stm32f303cc robotdyn mini dev board:
Blink.ino.zip
(640 Bytes) Downloaded 33 times
The code in the .bin:

Code: Select all

Hex dump of section '.isr_vector':
  0x08000000 00a00020 dd010008 91020008 95020008 ... ............
  0x08000010 99020008 9d020008 a1020008 00000000 ................
  0x08000020 00000000 00000000 00000000 a5020008 ................
  0x08000030 a9020008 00000000 ad020008 01000010 ................
  0x08000040 00000000 00000000 00000000 00000000 ................
  0x08000050 00000000 00000000 00000000 00000000 ................
  0x08000060 00000000 00000000 00000000 00000000 ................
  0x08000070 00000000 00000000 00000000 00000000 ................
  0x08000080 00000000 00000000 00000000 00000000 ................
  0x08000090 00000000 00000000 00000000 00000000 ................
  0x080000a0 00000000 00000000 00000000 00000000 ................
  0x080000b0 00000000 00000000 00000000 00000000 ................
  0x080000c0 00000000 00000000 00000000 00000000 ................
  0x080000d0 00000000 00000000 00000000 00000000 ................
  0x080000e0 00000000 00000000 00000000 00000000 ................
  0x080000f0 00000000 00000000 00000000 00000000 ................
  0x08000100 00000000 00000000 5ff808f1          ........_...

Disassembly of section .text:

0800010c <setup>:

    case OUTPUT:
    case OUTPUT_OPEN_DRAIN:
    case ALT_FUNC:
    case OUTPUT_MCO:
      MODIFY_REG(GPIOx.OSPEEDR, PinToMask(pinNumber,2), (speed << moder_offset));
 800010c:	4b09      	ldr	r3, [pc, #36]	; (8000134 <setup+0x28>)
 800010e:	689a      	ldr	r2, [r3, #8]
 8000110:	f022 6240 	bic.w	r2, r2, #201326592	; 0xc000000
 8000114:	609a      	str	r2, [r3, #8]
      if ( OUTPUT_OPEN_DRAIN == pinMode ) {
        MODIFY_REG(GPIOx.MODER, PinToMask(pinNumber,2), (0b01U << moder_offset));
 8000116:	681a      	ldr	r2, [r3, #0]
 8000118:	f022 6240 	bic.w	r2, r2, #201326592	; 0xc000000
 800011c:	f042 6280 	orr.w	r2, r2, #67108864	; 0x4000000
 8000120:	601a      	str	r2, [r3, #0]
        SET_BIT(GPIOx.OTYPER, PinToMask(pinNumber,1));
 8000122:	685a      	ldr	r2, [r3, #4]
 8000124:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8000128:	605a      	str	r2, [r3, #4]
  static void digitalWriteEx(const pin_size_t pinNumber, PinStatus status)
  {
    if ( status )
      WRITE_REG(PinToPort(pinNumber).BSRR, PinToMask(pinNumber));
    else
      WRITE_REG(PinToPort(pinNumber).BRR, PinToMask(pinNumber));
 800012a:	f44f 5200 	mov.w	r2, #8192	; 0x2000
 800012e:	629a      	str	r2, [r3, #40]	; 0x28

const pin_size_t LED_BUILTIN = PC13;
void setup(void) {
  pinModeEx(LED_BUILTIN, fabooh::OUTPUT_OPEN_DRAIN,0b00);
  digitalWriteEx(LED_BUILTIN, LOW);
}
 8000130:	4770      	bx	lr
 8000132:	bf00      	nop
 8000134:	48000800 	.word	0x48000800

08000138 <loop>:

void loop() {
 8000138:	b508      	push	{r3, lr}
 800013a:	f44f 5500 	mov.w	r5, #8192	; 0x2000
 800013e:	4c06      	ldr	r4, [pc, #24]	; (8000158 <loop+0x20>)
 8000140:	462e      	mov	r6, r5
 8000142:	62a6      	str	r6, [r4, #40]	; 0x28
  while (1) {
    digitalWriteEx(LED_BUILTIN,LOW);
    delay(100);
 8000144:	2064      	movs	r0, #100	; 0x64
 8000146:	f000 f8b3 	bl	80002b0 <delay>
      WRITE_REG(PinToPort(pinNumber).BSRR, PinToMask(pinNumber));
 800014a:	61a5      	str	r5, [r4, #24]
    digitalWriteEx(LED_BUILTIN,HIGH);
    delay(900);
 800014c:	f44f 7061 	mov.w	r0, #900	; 0x384
 8000150:	f000 f8ae 	bl	80002b0 <delay>
 8000154:	e7f5      	b.n	8000142 <loop+0xa>
 8000156:	bf00      	nop
 8000158:	48000800 	.word	0x48000800

0800015c <_init>:
  _init() - initialize board

  NOTE: called from __libc_init() before main(). It must be a "C" routine.
  */
void _init(void) {
  RCC->AHBENR  |= 0
 800015c:	4b13      	ldr	r3, [pc, #76]	; (80001ac <_init+0x50>)
 800015e:	695a      	ldr	r2, [r3, #20]
 8000160:	f442 1238 	orr.w	r2, r2, #3014656	; 0x2e0000
 8000164:	615a      	str	r2, [r3, #20]
               | RCC_AHBENR_GPIOBEN
               | RCC_AHBENR_GPIOCEN
               | RCC_AHBENR_GPIOEEN
               ;

  RCC->APB2ENR |= 0
 8000166:	699a      	ldr	r2, [r3, #24]
 8000168:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 800016c:	619a      	str	r2, [r3, #24]
               | RCC_APB2ENR_USART1EN           /* USART1         */
               ;

  RCC->APB1ENR |= 0
 800016e:	69da      	ldr	r2, [r3, #28]
 8000170:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8000174:	61da      	str	r2, [r3, #28]
  // enable SWD debugging
  MODIFY_REG(AFIO->MAPR, AFIO_MAPR_SWJ_CFG, AFIO_MAPR_SWJ_CFG_JTAGDISABLE);
#endif

  // enable DWT to provide tick_count()
  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
 8000176:	4a0e      	ldr	r2, [pc, #56]	; (80001b0 <_init+0x54>)
 8000178:	68d3      	ldr	r3, [r2, #12]
 800017a:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
 800017e:	60d3      	str	r3, [r2, #12]
  DWT->CYCCNT = -720000L;
 8000180:	4b0c      	ldr	r3, [pc, #48]	; (80001b4 <_init+0x58>)
 8000182:	4a0d      	ldr	r2, [pc, #52]	; (80001b8 <_init+0x5c>)
 8000184:	605a      	str	r2, [r3, #4]
  DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
 8000186:	681a      	ldr	r2, [r3, #0]
 8000188:	f042 0201 	orr.w	r2, r2, #1
 800018c:	601a      	str	r2, [r3, #0]

  /*---------------------------------------------------------------------- */
  // enable msec Systick ISR
  tickcnt=-500L; // test tickcnt wraparound, start @ .5 seconds before rollover
 800018e:	4b0b      	ldr	r3, [pc, #44]	; (80001bc <_init+0x60>)
 8000190:	4a0b      	ldr	r2, [pc, #44]	; (80001c0 <_init+0x64>)
 8000192:	601a      	str	r2, [r3, #0]
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8000194:	4b0b      	ldr	r3, [pc, #44]	; (80001c4 <_init+0x68>)
 8000196:	4a0c      	ldr	r2, [pc, #48]	; (80001c8 <_init+0x6c>)
 8000198:	605a      	str	r2, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800019a:	4a0c      	ldr	r2, [pc, #48]	; (80001cc <_init+0x70>)
 800019c:	21f0      	movs	r1, #240	; 0xf0
 800019e:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80001a2:	2200      	movs	r2, #0
 80001a4:	609a      	str	r2, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80001a6:	2207      	movs	r2, #7
 80001a8:	601a      	str	r2, [r3, #0]
  SysTick_Config(F_CPU/1000U);
}
 80001aa:	4770      	bx	lr
 80001ac:	40021000 	.word	0x40021000
 80001b0:	e000edf0 	.word	0xe000edf0
 80001b4:	e0001000 	.word	0xe0001000
 80001b8:	fff50380 	.word	0xfff50380
 80001bc:	20000000 	.word	0x20000000
 80001c0:	fffffe0c 	.word	0xfffffe0c
 80001c4:	e000e010 	.word	0xe000e010
 80001c8:	0001193f 	.word	0x0001193f
 80001cc:	e000ed00 	.word	0xe000ed00

080001d0 <main>:

/*---------------------------------------------------------------------
  int main() -
  */
int main(void) {
 80001d0:	b508      	push	{r3, lr}
  setup();
 80001d2:	f7ff ff9b 	bl	800010c <setup>

  while(1) {
    loop();
 80001d6:	f7ff ffaf 	bl	8000138 <loop>
 80001da:	e7fc      	b.n	80001d6 <main+0x6>

080001dc <Reset_Handler>:
  asm volatile ("ldr r0, =%0" :: "i" (&_estack));
 80001dc:	4823      	ldr	r0, [pc, #140]	; (800026c <bss_init+0x22>)
  asm volatile ("mov sp, r0");
 80001de:	4685      	mov	sp, r0
#ifdef USE_HSEBYP
  //SET_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSEBYP);
#else
//  SET_BIT(RCC->CR, RCC_CR_HSEON);
#endif
  SET_BIT(RCC->CR, RCC_CR_HSEON);
 80001e0:	4b20      	ldr	r3, [pc, #128]	; (8000264 <bss_init+0x1a>)
 80001e2:	681a      	ldr	r2, [r3, #0]
 80001e4:	f442 3280 	orr.w	r2, r2, #65536	; 0x10000
 80001e8:	601a      	str	r2, [r3, #0]

  /* Wait until HSE is ready */
  while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0) {
 80001ea:	681a      	ldr	r2, [r3, #0]
 80001ec:	0390      	lsls	r0, r2, #14
 80001ee:	d5fc      	bpl.n	80001ea <Reset_Handler+0xe>
    ;
  }

  /* Enable Prefetch Buffer & set Flash access to 2 wait states */
  SET_BIT(FLASH->ACR, FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2);
 80001f0:	491d      	ldr	r1, [pc, #116]	; (8000268 <bss_init+0x1e>)
 80001f2:	680a      	ldr	r2, [r1, #0]
 80001f4:	f042 0214 	orr.w	r2, r2, #20
 80001f8:	600a      	str	r2, [r1, #0]

  SET_BIT(RCC->CFGR,( RCC_CFGR_HPRE_DIV1  /* SysClk/1 72 MHz */
 80001fa:	685a      	ldr	r2, [r3, #4]
 80001fc:	f442 12e8 	orr.w	r2, r2, #1900544	; 0x1d0000
 8000200:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 8000204:	605a      	str	r2, [r3, #4]
                    | RCC_CFGR_PPRE2_DIV1 /* APB2/1 High Speed 72MHz */
                    | RCC_CFGR_PPRE1_DIV2 /* APB1/2 Low Speed  36MHz */
                    | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL9));

  /* Enable PLL */
  SET_BIT(RCC->CR, RCC_CR_PLLON);
 8000206:	681a      	ldr	r2, [r3, #0]
 8000208:	f042 7280 	orr.w	r2, r2, #16777216	; 0x1000000
 800020c:	601a      	str	r2, [r3, #0]

  /* Wait until PLL is ready */
  while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0) {
 800020e:	681a      	ldr	r2, [r3, #0]
 8000210:	0191      	lsls	r1, r2, #6
 8000212:	d5fc      	bpl.n	800020e <Reset_Handler+0x32>
    ;
  }

  /* Select PLL as system clock source */
  SET_BIT(RCC->CFGR, RCC_CFGR_SW_PLL);
 8000214:	685a      	ldr	r2, [r3, #4]
 8000216:	f042 0202 	orr.w	r2, r2, #2
 800021a:	605a      	str	r2, [r3, #4]

  /* Wait until PLL is used as system clock source */
  while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS_1) == 0) {
 800021c:	685a      	ldr	r2, [r3, #4]
 800021e:	0712      	lsls	r2, r2, #28
 8000220:	d5fc      	bpl.n	800021c <Reset_Handler+0x40>

08000222 <data_init>:
  );
 8000222:	4813      	ldr	r0, [pc, #76]	; (8000270 <bss_init+0x26>)
 8000224:	4913      	ldr	r1, [pc, #76]	; (8000274 <bss_init+0x2a>)
 8000226:	4a14      	ldr	r2, [pc, #80]	; (8000278 <bss_init+0x2e>)
 8000228:	4291      	cmp	r1, r2
 800022a:	bf3e      	ittt	cc
 800022c:	f850 3b04 	ldrcc.w	r3, [r0], #4
 8000230:	f841 3b04 	strcc.w	r3, [r1], #4
 8000234:	e7f8      	bcc.n	8000228 <data_init+0x6>

08000236 <ccm_init>:
  );
 8000236:	4811      	ldr	r0, [pc, #68]	; (800027c <bss_init+0x32>)
 8000238:	4911      	ldr	r1, [pc, #68]	; (8000280 <bss_init+0x36>)
 800023a:	4a12      	ldr	r2, [pc, #72]	; (8000284 <bss_init+0x3a>)
 800023c:	4291      	cmp	r1, r2
 800023e:	bf3e      	ittt	cc
 8000240:	f850 3b04 	ldrcc.w	r3, [r0], #4
 8000244:	f841 3b04 	strcc.w	r3, [r1], #4
 8000248:	e7f8      	bcc.n	800023c <ccm_init+0x6>

0800024a <bss_init>:
  );
 800024a:	480f      	ldr	r0, [pc, #60]	; (8000288 <bss_init+0x3e>)
 800024c:	490f      	ldr	r1, [pc, #60]	; (800028c <bss_init+0x42>)
 800024e:	2200      	movs	r2, #0
 8000250:	4288      	cmp	r0, r1
 8000252:	bf1c      	itt	ne
 8000254:	f840 2b04 	strne.w	r2, [r0], #4
 8000258:	e7fa      	bne.n	8000250 <bss_init+0x6>
  __libc_init_array();
 800025a:	f000 f833 	bl	80002c4 <__libc_init_array>
  main();
 800025e:	f7ff ffb7 	bl	80001d0 <main>
 8000262:	e7fe      	b.n	8000262 <bss_init+0x18>
 8000264:	40021000 	.word	0x40021000
 8000268:	40022000 	.word	0x40022000
 800026c:	2000a000 	.word	0x2000a000
 8000270:	0800030c 	.word	0x0800030c
 8000274:	20000000 	.word	0x20000000
 8000278:	20000000 	.word	0x20000000
 800027c:	0800030c 	.word	0x0800030c
 8000280:	10000000 	.word	0x10000000
 8000284:	10000010 	.word	0x10000010
 8000288:	20000000 	.word	0x20000000
 800028c:	20000004 	.word	0x20000004

08000290 <NMI_Handler>:
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8000290:	bf00      	nop
 8000292:	e7fd      	b.n	8000290 <NMI_Handler>

08000294 <HardFault_Handler>:
 8000294:	bf00      	nop
 8000296:	e7fd      	b.n	8000294 <HardFault_Handler>

08000298 <MemManage_Handler>:
 8000298:	bf00      	nop
 800029a:	e7fd      	b.n	8000298 <MemManage_Handler>

0800029c <BusFault_Handler>:
 800029c:	bf00      	nop
 800029e:	e7fd      	b.n	800029c <BusFault_Handler>

080002a0 <UsageFault_Handler>:
 80002a0:	bf00      	nop
 80002a2:	e7fd      	b.n	80002a0 <UsageFault_Handler>

080002a4 <SVCall_Handler>:
 80002a4:	bf00      	nop
 80002a6:	e7fd      	b.n	80002a4 <SVCall_Handler>

080002a8 <DebugMonitor_Handler>:
 80002a8:	bf00      	nop
 80002aa:	e7fd      	b.n	80002a8 <DebugMonitor_Handler>

080002ac <PendSV_Handler>:
 80002ac:	bf00      	nop
 80002ae:	e7fd      	b.n	80002ac <PendSV_Handler>

080002b0 <delay>:
uint32_t millis() {
    return tickcnt;
}

void delay(uint32_t msecs) {
  if (msecs) {
 80002b0:	b128      	cbz	r0, 80002be <delay+0xe>
    return tickcnt;
 80002b2:	4b03      	ldr	r3, [pc, #12]	; (80002c0 <delay+0x10>)
 80002b4:	6819      	ldr	r1, [r3, #0]
 80002b6:	681a      	ldr	r2, [r3, #0]
    uint32_t t0 = millis();

    while ((millis() - t0) < msecs) {
 80002b8:	1a52      	subs	r2, r2, r1
 80002ba:	4282      	cmp	r2, r0
 80002bc:	d3fb      	bcc.n	80002b6 <delay+0x6>
      yield();
    }

  }
}
 80002be:	4770      	bx	lr
 80002c0:	20000000 	.word	0x20000000

080002c4 <__libc_init_array>:
 80002c4:	b570      	push	{r4, r5, r6, lr}
 80002c6:	4e0d      	ldr	r6, [pc, #52]	; (80002fc <__libc_init_array+0x38>)
 80002c8:	4c0d      	ldr	r4, [pc, #52]	; (8000300 <__libc_init_array+0x3c>)
 80002ca:	1ba4      	subs	r4, r4, r6
 80002cc:	10a4      	asrs	r4, r4, #2
 80002ce:	2500      	movs	r5, #0
 80002d0:	42a5      	cmp	r5, r4
 80002d2:	d109      	bne.n	80002e8 <__libc_init_array+0x24>
 80002d4:	4e0b      	ldr	r6, [pc, #44]	; (8000304 <__libc_init_array+0x40>)
 80002d6:	4c0c      	ldr	r4, [pc, #48]	; (8000308 <__libc_init_array+0x44>)
 80002d8:	f7ff ff40 	bl	800015c <_init>
 80002dc:	1ba4      	subs	r4, r4, r6
 80002de:	10a4      	asrs	r4, r4, #2
 80002e0:	2500      	movs	r5, #0
 80002e2:	42a5      	cmp	r5, r4
 80002e4:	d105      	bne.n	80002f2 <__libc_init_array+0x2e>
 80002e6:	bd70      	pop	{r4, r5, r6, pc}
 80002e8:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80002ec:	4798      	blx	r3
 80002ee:	3501      	adds	r5, #1
 80002f0:	e7ee      	b.n	80002d0 <__libc_init_array+0xc>
 80002f2:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80002f6:	4798      	blx	r3
 80002f8:	3501      	adds	r5, #1
 80002fa:	e7f2      	b.n	80002e2 <__libc_init_array+0x1e>
 80002fc:	0800030c 	.word	0x0800030c
 8000300:	0800030c 	.word	0x0800030c
 8000304:	0800030c 	.word	0x0800030c
 8000308:	0800030c 	.word	0x0800030c

Disassembly of section .ccmram:

10000000 <SysTick_Handler>:
  */
void SysTick_Handler(void) __attribute__((section(".ccmram")));

void SysTick_Handler(void)
{
  ++tickcnt;
10000000:	4a02      	ldr	r2, [pc, #8]	; (1000000c <SysTick_Handler+0xc>)
10000002:	6813      	ldr	r3, [r2, #0]
10000004:	3301      	adds	r3, #1
10000006:	6013      	str	r3, [r2, #0]
}
10000008:	4770      	bx	lr
1000000a:	bf00      	nop
1000000c:	20000000 	.word	0x20000000
Section '.rodata' has no data to dump.
Section '.data' has no data to dump.
-rick

User avatar
Rick Kimball
Posts: 71
Joined: Thu Mar 14, 2019 6:27 pm
Location: Eastern NC, US
OS: Linux
IDE: Arduino 1.8.9, vscode+make, eclipse, vi, emacs
Core: libmaple, STM official, fabooh, none
Board: Bluepill, Nucleos, Discovery
Contact:

Re: RobotDyn STM32F303CC Mini System Dev Board

Post by Rick Kimball » Wed Jun 12, 2019 8:05 pm

Some casual first observations of the RobotDyn stm32f303 board.
  • Ordered on May 29th in the evening, arrived in the US from China June 12th. I was able to track it using the USPS website starting in China and as it made the journey.
  • 5 boards came in individual static bags rolled in bubble wrap inside a small padded envelope.
  • First impression of the boards makes you smile. Board layout isn't haphazard like the bluepills. Resistors and components are aligned and just look right.
  • I got the unsoldered version and it came with 2 20 pin header pins a 6 pin dual row header, and a 4 pin angled SWD header and 2 jumper blocks.
  • The printing on the chip looks like what I see on the chips of my Nucleo and Discovery boards. In other words, they don't feel like they have been recycled or came from the reject pile.
  • Date code marking on the chip indicate it was made 2018 Week 04 "804" and it is the "Y" revision
  • Schematic of the board is available if you ask. They provide you a link to download. It is for the stm32f103c board though.
  • Silkscreen pin numbers on the board are very neat and readable. Pins are marked on both sides of the board.
  • Layout of the board is very neat.
  • Cylindrical 32.768k xtal and voltage regulator are on the back side of the board.
  • Board width is skinnier than bluepill. The numbers are on the inside of the pins instead of the outside like the bluepill. It is probably the same size as the Baite Maple Mini.
  • Exact same pin layout as the bluepill. SWD pins, 3V3, 5V and several GND pins all easily accessible.
  • Supports ROM based USB DFU so you can load the board without an STlink or USB dongle.
  • USB connector is through hole connected.
  • Board had a "QC" sticker and a serial number printed on a sticker
  • Reset switch is just right size with a plastic plunger
  • Because BOOT1 is an option byte instead of the pin, you can use the PB2/BOOT1 pin as a user button.
  • Power on LED is green and User LED is blue. User LED is PC13 and active low.
  • 40k of SRAM / 256k of Flash and 8k of CCM SRAM. I put some of my ISR routines in CCM SRAM which is connected to both the ICODE-BUS and DCODE-BUS. This allows you to run your ISR routines from RAM and access data variables without any wait states. It also prevents your flash prefetch buffer from being flushed when an ISR happens. This is pretty slick. You can get the full 90 MIPS running at 72MHz
I think this is going to become my new favorite board and chip. :)
-rick

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BennehBoy
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Joined: Tue Mar 05, 2019 7:43 pm
Location: Yorkshire
OS: Windows 10
IDE: 1.8.9, Sloeber
Core: Roger's & STM
Board: Blue/Blackpill, MM, HYTiny, Black407Z/VET6, DiyMroe, FK407M1
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Re: RobotDyn STM32F303CC Mini System Dev Board

Post by BennehBoy » Wed Jun 12, 2019 9:01 pm

Mine are in the post :D
-Ben

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