Microchip Unveils Family Details and Opens Early Access Program for RISC-V Enabled Low-Power PolarFire SoC FPGA Family

Anything not related to STM32
Post Reply
ag123
Posts: 243
Joined: Thu Mar 07, 2019 6:15 am
OS: linux
IDE: eclipse, arduino 1.8.5
Core: Roger's
Board: Maple mini, Bluepill

Microchip Unveils Family Details and Opens Early Access Program for RISC-V Enabled Low-Power PolarFire SoC FPGA Family

Post by ag123 » Thu Dec 12, 2019 4:04 am

https://www.microchip.com/pressreleasep ... ss-program

RISC-V seemed to be getting some adoption momentum and it seemed there is a trend in mcus
fpga is getting involved and i think we may see pheriperials like uart, spi, i2c etc replaced by generic fpga blocks and partly by software

mrburnette
Posts: 113
Joined: Fri Mar 29, 2019 2:22 am
Answers: 1
OS: Linux
IDE: Arduino
Core: Any
Board: Blue, MM, Black

Re: Microchip Unveils Family Details and Opens Early Access Program for RISC-V Enabled Low-Power PolarFire SoC FPGA Fami

Post by mrburnette » Fri Dec 13, 2019 1:04 am

ag123 wrote:
Thu Dec 12, 2019 4:04 am
https://www.microchip.com/pressreleasep ... ss-program

RISC-V seemed to be getting some adoption momentum and it seemed there is a trend in mcus
fpga is getting involved and i think we may see pheriperials like uart, spi, i2c etc replaced by generic fpga blocks and partly by software
Cypress many years back offered the $4 PSoC 4200 which had both analog and digital cells with a rather flexible connectivity matrix to map function to pin. Down side at that time was Windows(tm) only tools and a very steep learning curve. However, I found it a capable and "fun" design environment (drag-n-drop external pinout joy!)
https://www.hackster.io/rayburne/gps-cl ... 200-d03a81

For the price-point, it really was ahead of its time. I also found it rather fun to just write in "C" let the tools do the work. The graphical project outline and self-documentation were an added plus.

ag123
Posts: 243
Joined: Thu Mar 07, 2019 6:15 am
OS: linux
IDE: eclipse, arduino 1.8.5
Core: Roger's
Board: Maple mini, Bluepill

Re: Microchip Unveils Family Details and Opens Early Access Program for RISC-V Enabled Low-Power PolarFire SoC FPGA Fami

Post by ag123 » Fri Dec 13, 2019 3:42 am

yup cypress did well and is a good pioneer. i may start playing with the cypress cpld socs to get a feel of this, it seemed digital io blocks e.g. spi, i2c, uart, timers, etc may be replaced by generic fpga style blocks + look up tables and it may become widespread across microcontrollers

Post Reply